The present invention relates to a method and apparatus for testing electrical devices, particularly analog electrical devices.
A conventional test system 10 utilized to test an analog device 11 is illustrated in FIG. 1. Since the device 11 to be tested is typically one component of many components embedded within a printed circuit board (not shown), it is necessary to establish electrical contact with this device within its associated circuit. Thus, such a test system 10 includes one or more pin probes 13 which are electrically connected through a switching and amplifier matrix 14 to an electric test assembly. This electric test assembly has a controller or processor 15, as well as a stimulus section 16 and a measurement section 17, which are controlled by the processor 15. Typically a clock or sequencer 18 is also connected to the processor 15 to afford the timing and sequencing of the stimulus and the measurement sections.
The stimulus section 16 of system 10 is capable of generating a stimulus signal (such as a voltage step function) having a known and constant magnitude after some time "T.sub.o ". This stimulus signal is applied to the device 11 under test through the probes 13. For example, a stimulus voltage could be applied at node 20 in order to cause a current to flow through the device 11. The resulting current flowing through the device 11 and the resulting voltage drop across the device 11 could then be measured at node 21. It is readily apparent, for example, that the impedance of the device 11 under test can be determined from the voltage drop across the device 11 and the current flowing through the device 11. This determined impedance can then be compared to the known impedance of a comparable functioning device, derived either by calculation from the known parameters of the device, or by measuring a comparable device known to be good. This derived value for the impedance of a functioning device can be provided as an input to the processor 15 at terminal 19. If the determined response is substantially equivalent to the derived or known response for a functioning device, the component under test is considered acceptable and functioning properly. If however the determined response differs from the calculated or measured response by more than a predetermined range of tolerance, the device under test is assumed to be defective.
Such conventional test systems as described above are not however, able to efficiently test circuits or devices having a response that varies with time, e.g. circuits containing either capacitance or inductance therein. In such circuits the response to the stimulus signal is neither immediate nor constant. Rather there is a rise time and a settling time associated with such circuits. It is not abnormal in such circuits to have a settling time in the range of from 2 milliseconds to 5 seconds after the stimulus signal has been applied. In order to accurately determine whether the component is acceptable or defective, the conventional testing systems wait for the response to substantially settle to its final value before making a measurement in order for the ultimate comparison to have a significance. This wait time substantially increases the time required to test a device or the printed circuit board containing the time varying device.